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 GTLP8T306 8-Bit LVTTL/GTLP Bus Transceiver
September 1997 Revised April 2000
GTLP8T306 8-Bit LVTTL/GTLP Bus Transceiver
General Description
The GTLP8T306 is an 8-bit bus transceiver that provides LVTTL to GTLP signal level translation. The device provides a high speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP logic levels. High speed backplane operation is a direct result of GTLP's reduced output swing (<1V), reduced input threshold levels and output edge rate control. The edge rate control minimizes bus settling time. GTLP is a Fairchild Semiconductor derivative of the Gunning Transceiver logic (GTL) JEDEC standard JESD8-3. Fairchild's GTLP has internal output edge-rate control and is process, voltage, and temperature (PVT) compensated. Its function is similar to BTL and GTL but with different output levels and receiver thresholds. The GTLP output LOW level is typically less than 0.5V, the output HIGH level is 1.5V and the receiver threshold is 1.0V.
Features
s Bidirectional interface between GTL/GTLP and LVTTL logic levels s Output Edge Rate Control to minimize noise on the GTLP port s Power up/down/off high impedance for live insertion s Standard 245 function s CMOS technology for low power dissipation s 5V tolerant inputs and outputs on the A-Port s Bus-hold data inputs on the A-Port eliminates the need for external pull-up resistors on unused inputs s LVTTL compatible driver and control inputs s Flow through pinout optimizes PCB layout s Open drain on GTLP to support wired-or connection s A-Port source/sink -24 mA/+24 mA s B-Port sink 50 mA s Recommended Operating Temperature -40C to +85C
Ordering Code:
Order Number GTLP8T306MTC Package Number MTC24 Package Description 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagram
(c) 2000 Fairchild Semiconductor Corporation
DS500051
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GTLP8T306
Pin Descriptions
Pin Names OE T/R A0-A7 B0-B7 VREF Description Output Enable (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs GTLP Reference Voltage
Truth Table
Inputs Output OE H L L T/R X L H HIGH Z on Bus A and Bus B Bus B Data to Bus A Bus A Data to Bus B
Functional Description
The GTLP8T306 is an 8-bit transceiver providing the standard 245 functionality that supports both GTL and GTLP signal levels. Data polarity is non-inverting and the data flow direction is controlled by the T/R pin. The outputs are enabled to allow data through the device when OE is LOW otherwise both the A and B ports are placed in a HIGH impedance state.
Logic Diagram
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GTLP8T306
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Voltage (VI) DC Output Voltage (VO) Outputs 3-STATE Outputs Active (Note 2) DC Output Sink Current into A-Port IOL DC Output Source Current from A-Port IOH DC Output Sink Current into B-Port in the LOW State, IOL DC Input Diode Current (IIK) VI < 0V DC Output Diode Current (IOK) VO < 0V VO > VCC ESD Rating Storage Temperature (TSTG) -50 mA +50 mA >2000V -65C to +150C -50 mA 100 mA -48 mA -0.5V to +7.0V -0.5V to 7.0V 48 mA -0.5V to 7.0V -0.5V to +7.0V
Recommended Operating Conditions (Note 3)
Supply Voltage VCC Bus Termination Voltage (VTT) GTLP GTL Input Voltage (VI) on A-Port and control pins HIGH Level Output Current (IOH) A-Port LOW Level Output Current (IOL) A-Port B-Port Operating Temperature (TA) +24 mA +50 mA -40C to +85C -24 mA 0V to 5.5V 1.35V to 1.65V 1.14V to 1.26V 3.15V to 3.45V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: IO Absolute Maximum Rating must be observed. Note 3: Unused inputs must be held high or low.
3
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GTLP8T306
DC Electrical Characteristics
Over Recommended Operating Free-Air Temperature Range, VREF = 1.0V (unless otherwise noted). Symbol VIH VIL VREF VIK VOH A-Port B-Port Others B-Port Others GTLP GTL VCC = 3.15V VCC = Min to Max (Note 5) VCC = 3.15V VOL A-Port VCC = Min to Max (Note 5) VCC = 3.15V B-Port II A-Port Control Pins B-Port IOFF II (Hold) IOZH IOZL ICC A-Port A-Port A-Port B-Port A-Port B-Port A or B Ports VCC = 3.45V VCC = 3.45V VCC = 3.45V IO = 0 VI = V CC or GND ICC (Note 6) CIN A-Port and Control Pins Control Pins A-Port B-Port
Note 4: All typical values are VCC = 3.3V and T A= 25C. Note 5: For conditions shown as Min, use the appropriate value specified under recommended operating conditions. Note 6: This is the increase in supply current for each input that is at the specified LVTTL voltage level rather than VCC or GND.
Test Conditions
Min VREF +0.05 2.0 0.0
Typ (Note 4)
Max VTT VREF -0.05 0.8
Units V V V V V V
1.0 0.8 II = -18 mA IOH = -100 A IOH = -12 mA IOH = -24 mA IOL = 100 A IOL = 24 mA IOL = 40 mA IOL = 50 mA VCC = 3.45V VCC = 3.45V VCC = 3.45V VCC = 0 VCC = 3.15V VCC = 3.45V VI = 5.5V VI = 0V VI = 5.5V VI = 0V VI = VTT VI = 0 VI or VO = 0 to 4.5V VI = 0.8V VI = 2.0V VO = 3.45V VO = 1.5V VO = 0 VO = 0.55 Outputs HIGH Outputs LOW Outputs Disabled One Input at VCC-0.6V 7 8 8 0 75 -20 20 5 -20 -5 18 20 20 1 VCC -0.2 2.4 2.0 0.2 -1.2
V
V
V 0.5 0.4 0.55 20 -20 5 -5 5 -5 100 A A A A A V A A
VCC = 3.15V
mA
VCC = 3.45V A or Control Inputs at VCC or GND
mA VI = VCC or 0 VI = VCC or 0 VI = VCC or 0 5 7 9 pF
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GTLP8T306
AC Electrical Characteristics
Over recommended range of supply voltage and operating free air-temperature, VREF = 1.0V (unless otherwise noted).
CL = 30 pF for B-Port and CL = 50 pF for A-Port.
Symbol tPLH tPHL tPLH tPHL tRISE tFALL tRISE tFALL tPZH, tPZL tPHZ, tPLZ tPLH tPHL
Note 7: All typical values are at VCC = 3.3V and TA = 25C.
From (Input) An
To (Output) Bn
Min 1.0 1.0
Typ (Note 7) 4.0 5.1 5.8 4.9 2.6 2.6 2.5 2.5
Max 7.5
Units
ns 7.5 8.3 ns 1.0 Transition Time, B Outputs (20% to 80%) Transition Time, B Outputs (20% to 80%) Transition Time, A Outputs (10% to 90%) Transition Time, A Outputs (10% to 90%) OE An 1.0 1.0 OE Bn 1.0 1.0 8.3 ns ns ns ns 9.5 ns 4.9 5.4 6.0 9.5 9.5 ns 9.5 Bn An 1.0
4.5
5
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GTLP8T306
Test Circuit and Timing Waveforms
Test Circuit for A Outputs Test Circuit for B Outputs
Voltage Waveforms Pulse Duration (VM = VCC/2 for A-Port and 1.0 for B-Port)
Voltage Waveforms Enable and Disable Times A-Port
Voltage Waveforms Propagation Delay and Setup and Hold Times (VM = VCC/2 for A-Port and 1.0 for B-Port)
Note A: CL includes probes and Jig capacitance. Note B: For B-Port, CL = 30 pF is used for worst case.
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GTLP8T306 8-Bit LVTTL/GTLP Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Thin Shrink Small Outline Package, JEDEC MO-153, 4.4mm Wide Package Number MTC24
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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